Pinned toot

We are proud to announce the birth of the Free Silicon Foundation (!

We organize a conference in Paris, March 14-16 2019, to promote:

1. Free and Open Source (FOS) CAD tools for designing circuits
2. the sharing of hardware designs
3. common standards
4. the freedom of users in the context of technology

Program and submissions:

We have submitted a proposal for a European call entitled "Coordination and Support Action (CSA) for Open Source Hardware for ultra-low-power, secure microprocessors":

Our proposal can be downloaded at:

We feel that sufficiently new ideas have been generated for justifying the publication. This will further increase the of the selection process.

If you have any comments please leave them below.

The affair shows that complex systems have backdoors that can be turned against everyone by malicious interests. This could affect hardware too.

The general discussion should nevertheless not drift away from the question about the (il-)legitimacy of such companies/government

Due to COVID, the Free Silicon Conference 2021 will not take place physically, but it will be replaced by online talks and interviews.

On Tuesday July 13 at 18:30 (Central European Time) join the interview on with Matthias Koefferlein, the developer of and participate to the discussion.

An article in German entitled "Consequences of the US boycott: China builds up its own EDA industry "

By-the-way, the problem with EDA access touches Europe as well, and Free and Open Source is an alternative too.

Due to COVID, the Free Silicon Conference 2021 will not take place physically, but it will be replaced by online talks and interviews.

Next Thursday (June 10) at 10:00 (Central European Time) join the interview on with Staf Verhaegen of Chips4Makers ( and participate to the discussion.

Next week, Thursday May 18, follow the online session on the future of European open hardware, hosted by the Next Generation Internet (NGI)

Streaming is via BigBlueButton and does not require registration.

The third Free Conference () has been postponed to 2021
because of the coronavirus pandemic.

Watch the teaser for FSiC2021!

" from 2011 to 2019 vulnerable to two new attacks"

"With Collide+Probe, an attacker can monitor a victim’s memory accesses without knowledge of physical addresses or shared memory when time-sharing a logical core. With Load+Reload, we exploit the way predictor to obtain highly-accurate memory-access traces of victims on the same physical ."

"The intelligence coup of the century"

For decades, the read the encrypted communications of allies and adversaries exploiting backdoors in silicon chips.

Free and open-source silicon will allow everybody to audit the full chip design, from netlists down to layout.

Keep up with Free silicon!

The Free Silicon Foundation adopts a different funding model than and promotes independence.

We think that certain sponsorships are problematic not only because of an evident conflict of interest (e.g. vs ), but also because they induce some people and/or organizations like our not to attend , therefore impacting, among others, the plurality of views on topics which can be as delicate as licences (

We prepared a white paper for the containing recommendations about as encouraged last November:

Please discuss it or endorse it by replying to this thread.
The paper will be delivered on January 31.

A first draft was shared in December with:

* @aprilorg
* @fsfe
* @fsf
* Aral Balkan @aral
* @waag
* @conservancy

What are the limitations of existing free and open-source (FOS) electronic design automation () tools?

What is it missing to design a chip with 1+ Million gates?

Which will be the first foundry to open a process design kit (PDKs)?

These are some of the questions that will be addressed at the third Free Silicon Conference () which will be held in Zurich on June 4-6 2020.

More info at:

Picture: the Raven chip of Tim Edwards

The third Free Silicon Conference, , will take place in Zurich on June 4-6 2020.

It builds on top of the previous edition (FSiC2019), where 100+ experts and enthusiasts gathered together to discuss how to design free/libre silicon chips.

To get involved visit:

The submission window opens on January 1st and participation is free of charge.

The European Commission is organizing a "Workshop about the future of Open Source Software and Open Source Hardware", Brussels, November 14-15 2019:

Online registration will close on November 6.

Is it possible to simulate transistors using open-source tools only?

How fast are the available solvers?

How hard is it to interface with existing PDKs?

The following talks provide very promising answers:

* ngspice - an open source mixed signal circuit simulator, by Holger Vogt

* Gnu Circuit Analysis Package (GnuCap), by Al Davis

* Converting 45nm transistor netlists to open standards, by Thomas Benz

Which foundries are the most friendly to open-source? Is there an open-source ?

Kholdoun Torki of Circuits-Multi-Projects ( provided a great overview:

"Towards Foundry PDKs on Free CAD Tools"

All the recordings of the Free Silicon Conference are now online:

Day 1 focuses on high-level design. Some of the concepts presented in the first talks can be partially applied to FPGAs as well

Day 2 discusses aspects closer to silicon, such as PDKs, memory generators and layouting

Day 3 presents hands-on tutorials

The full program is available at:

The past Free Silicon Conference was opened with a great talk by Todd Weaver from :

"The Future of Computing and Why You Should Care"

We proudly announce to run our own instance to host the videos of the past Free Silicon Conference 2019:

Show more
Mastodon is one server in the network