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We are proud to announce the birth of the Free Silicon Foundation (!

We organize a conference in Paris, March 14-16 2019, to promote:

1. Free and Open Source (FOS) CAD tools for designing circuits
2. the sharing of hardware designs
3. common standards
4. the freedom of users in the context of technology

Program and submissions:

The ENISA (the EU's cybersecurity agency) is holding a series of 21 consultations about technical aspects of the Cyber Resilience Act (CRA). The consultations started already yesterday.

If you can help represent the open-source perspective, please consider participating.

Schedule and registration details:

The General Public License (GPL) is unfortunately not suited for electronic devices and silicon chips in particular. We would like therefore to develop a GPL-compatible hardware licence.

Are you interested to submit a tender? Then do so by July 3:

Join us in less than an hour for a tech talk with Andrew "bunnie" Huang. He's currently working on IRIS: (Infra-Red, In-Situ) inspection of silicon, a project to facilitate the non-destructive verification of silicon chips.

There will be lots of time for questions and comments as he is interested to hear peoples' thoughts about IRIS.

Today at 11.00 CEST (Brussels time) / 17.00 SGT (Singapore time). For the link to the BBB video room see:

#openhardware #opensource

Are you interested to participate to a public discussion on the development of open-source silicon and open-source Electronic Design Automation (EDA) in Europe?

Then join our introductory webinar on May 14 over :

This event will be followed by an in-person workshop on June 18 in Paris (right before ) and by Working Groups. The discussion will lead to a new for the .

If you are affiliated with a university please consider signing the following letter which calls for open-source Electronic Design Automation (EDA) tools:

The letter is hosted by the FOSSi Foundation @fossifoundation .

Btw: If you are interested to participate to a public discussion on the development of open-source silicon and open-source EDA please join us on May 14 over :

"Open source CPU and SoC design: the flow, the challenges and a perspective"

Listen to the experiences of Charles Papon tomorrow (Thursday April 11) at 13:00 CEST:

Dear Fediverse,

we want to host a instance for meetings with up to 100 participants.

Can somebody recommend a setup which scales to this number?

We have in mind to rent a dedicated server at Hetzner. Unfortunately, this is difficult to test ahead of the meeting.


We have 4 new open calls for funding for projects that contribute to an open, trustworthy, human-centered internet. Projects must be free and open source and papers published

Deadline is June 1, 12.00 (noon) CEST
#NGI0 #opensource

Join us for the webinar Open source CPU and SoC design : The flow, the challenges and a perspective with Charles Papon on April 11, 2024, 13:00-14:30 CET.

Through the lens of the SpinalHDL, VexRiscv and NaxRiscv projects, Papon will discuss open CPU design, deploying it on hardware, lessons learned and challenges.

For more info and a link to the BBB room see No need to subscribe, the room is open.

#openhardware #RISC-V #webinar

We are glad to announce the next edition of the Free Silicon Conference () which will be held in Paris on June 19, 20, 21 2024:

Please help us to spread the voice and to identify new open-silicon projects and new open-source Electronic Design Automation (EDA) tools.

To propose or suggest an idea just answer to this toot or write at fsic2024'at'

Join on November 15-16 in Brussels or online the 2023 Forum and connect with policymakers, researchers, innovators, industry representatives, and users.

NGI has catalysed projects such as , and .

We prepared a list of recommendations and a roadmap for the European Commission for the development of open-source silicon in the EU.

The full text can be downloaded here:

If you have any thoughts or comments on the document please answer to this thread.

2. unpublished files from the #Snowden archive (2013) reveal that the #NSA backdoored #Cavium, an American semiconductor company marketing Central Processing Units (CPUs):

Check out Gaëtan Cassiers from TU Graz presenting "Physical for implementations with open hardware" (

At min 10:05 he says "We develop it once, we evaluate it a lot and hopefully it is secure forever".

A RISC-V chip with with secret RTL (not to mention the layout) does not qualify as open-hardware. Otherwise MS Word would be open-source software just because it implements the Open Document Format (ODF).

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