"Open source CPU and SoC design: the flow, the challenges and a perspective"

Listen to the experiences of Charles Papon tomorrow (Thursday April 11) at 13:00 CEST:
ngi.eu/event/webinar-open-sour

Dear Fediverse,

we want to host a instance for meetings with up to 100 participants.

Can somebody recommend a setup which scales to this number?

We have in mind to rent a dedicated server at Hetzner. Unfortunately, this is difficult to test ahead of the meeting.

@senfcall

We have 4 new open calls for funding for projects that contribute to an open, trustworthy, human-centered internet. Projects must be free and open source and papers published

Deadline is June 1, 12.00 (noon) CEST
#NGI0 #opensource

Join us for the webinar Open source CPU and SoC design : The flow, the challenges and a perspective with Charles Papon on April 11, 2024, 13:00-14:30 CET.

Through the lens of the SpinalHDL, VexRiscv and NaxRiscv projects, Papon will discuss open CPU design, deploying it on hardware, lessons learned and challenges.

For more info and a link to the BBB room see nlnet.nl/webinars/. No need to subscribe, the room is open.

#openhardware #RISC-V #webinar

We are glad to announce the next edition of the Free Silicon Conference () which will be held in Paris on June 19, 20, 21 2024:

wiki.f-si.org/index.php/FSiC20

Please help us to spread the voice and to identify new open-silicon projects and new open-source Electronic Design Automation (EDA) tools.

To propose or suggest an idea just answer to this toot or write at fsic2024'at'f-si.org.

Join on November 15-16 in Brussels or online the 2023 Forum and connect with policymakers, researchers, innovators, industry representatives, and users.

NGI has catalysed projects such as , and .

ngi.eu/event/ngi-forum-2023/

We prepared a list of recommendations and a roadmap for the European Commission for the development of open-source silicon in the EU.

The full text can be downloaded here:
wiki.f-si.org/index.php?title=

If you have any thoughts or comments on the document please answer to this thread.

2. unpublished files from the #Snowden archive (2013) reveal that the #NSA backdoored #Cavium, an American semiconductor company marketing Central Processing Units (CPUs):

computerweekly.com/news/366552

Check out Gaëtan Cassiers from TU Graz presenting "Physical for implementations with open hardware" (peertube.f-si.org/videos/watch).

At min 10:05 he says "We develop it once, we evaluate it a lot and hopefully it is secure forever".

@pyropeter Currently not, but within the GoIT project (goit-project.eu) our partners will build a repository for open-source EDA tools and hardware cores which include open layouts. See FSiC2023 for a first contribution of this type.

A RISC-V chip with with secret RTL (not to mention the layout) does not qualify as open-hardware. Otherwise MS Word would be open-source software just because it implements the Open Document Format (ODF).

The German Federal Ministry of Education and Research () is announcing funding opportunities for open-source EDA development (careful: text in formal German only!):
elektronikforschung.de/foerder

i will be keynote speaking at Free Silicon Conference 2023 at Sorbonne University, Paris. The conference goes from July 10-12. wiki.f-si.org/index.php/FSiC20

We are glad to announce the next edition of the Free Silicon Conference () which will be held in Paris on July 10,11,12 2023.

The tentative program is:
wiki.f-si.org/index.php/FSiC20

Please help us spreading the voice, and please propose or suggest ideas by answering this toot or by writing at fsic2023'at'f-si.org.

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