What are the limitations of existing free and open-source (FOS) electronic design automation (#EDA) tools?

What is it missing to design a chip with 1+ Million gates?

Which will be the first foundry to open a process design kit (PDKs)?

These are some of the questions that will be addressed at the third Free Silicon Conference (#FSiC2020) which will be held in Zurich on June 4-6 2020.

More info at:
https://wiki.f-si.org/index.php/FSiC2020

Picture: the Raven chip of Tim Edwards
https://peertube.f-si.org/videos/watch/e8404429-4d32-4741-ac11-1beb0f16348e