What are the limitations of existing free and open-source (FOS) electronic design automation (#EDA) tools?
What is it missing to design a chip with 1+ Million gates?
Which will be the first foundry to open a process design kit (PDKs)?
These are some of the questions that will be addressed at the third Free Silicon Conference (#FSiC2020) which will be held in Zurich on June 4-6 2020.
More info at:
Picture: the Raven chip of Tim Edwards