Global chip tensions put open-source silicon at a crossroads. Steward Ownership -splitting profit from control- offers a path to sustainability + independence, protecting mission and fueling commons-based innovation.

See the talk of Melanie Rieback:
peertube6.f-si.org/w/vdaZs9Ryk

More info:
wiki.f-si.org/index.php?title=


The call for Design Enablement Teams () opened on 4 June. The deadline is on 30 July 2025 (soon!).

A DET provides support for designing chips. This includes application engineering support, cloud-based EDA infrastructure, setup of design environment, foundry access, supply chain management: chips-ju.europa.eu/Appendix6_I (page 10)

Call details: chips-ju.europa.eu/CallDetails

Past workshop: chips-ju.europa.eu/Events-deta

See also slide 12 of: wiki.f-si.org/index.php?title=

Xueyan Zhao announced that is expected to open a 55nm PDK in July 2025:

* ICSprout is jointly established by Zhejiang Provincial Government and Zhejiang University
* It has 12-inch CMOS 180/55nm process lines
* First test chip on ICSprout 55nm Open PDK taped-out in June 15 2025
* Price range: 1400$ - 5600$/mm2

For more information see slide 16 of wiki.f-si.org/index.php?title=

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